Tuesday, April 14, 2015

SFARDS New 28nm BTC and LTC Dual-Algorithm ASIC Specifications Unveiled

sfards-sf3301-dual-asic-chips

SFARDS, the company formed after the merging Gridseed and WiiBox, has just announced that they have completed their new 28nm SF3301 dual-algorithm ASIC chip manufactured using the latest in FD-SOI processing technology and have released specifications about expected power usage and performance. The SF3301 is the claimed to be the world’s first chip to use this manufacturing process and is at the same time the first 28nm dual-algorithm (SHA-256 and Scrypt) chip, capable of mining these two algorithms simultaneously or separately.


According to SFARDS this technology allows for the ASIC chip to operate at lower voltage while maintaining a higher frequency resulting in better balance between power usage and performance. The SF3301 ASIC chip should have a lowest working voltage of only 0.45V with a BTC power efficiency at 0.19 J/GH, and LTC power efficiency at 1.75 J/MH (better than the initially announced numbers). With a reported performance for a single SF3301 chip for BTC with a hashrate of 152 GH/s, and LTC hashrate of 3.17 MH/s things may become interesting again for Scrypt miners, though it also depends on the price per chip. We are talking about a power consumption figures of about 29W per chip (152 GHS) in BTC mode and about 5.5W per chip (3.17 MHS) in LTC mode or supposedly in dual mining mode, for both BTC and LTC, a combined power usage of about 35W per chip. Now scale that to a 10 chip ASIC miner and you should get something like 1.5 THS BTC + 32 MHS LTC mining power with a 350W power usage or a bit more…


SFARDS is apparently planning to release a number of documents for the SF3301 as open-source by the end of this month. The ASIC’s development board design and its software should also be published, and in May the design specifications for their debut Dual Miner solution is expected to be released. SFARDS will be selling ASIC development boards and sample chips, making the SF3301 accessible to developers who wish to customize and build their own hardware in the near future, though no mention of expected time frame is mentioned yet. No word yet on piring per chip or the miner or the number of chips we are going to see in the first upcoming miner.


For more information about the new SFARDS ASIC mining hardware manufacturer…


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